1. Field of the Invention
The present invention relates to the application field regarding IC packaging, particularly to a wire-bonding method for chips with copper interconnects by introducing a thin layer.
2. The Prior Arts
In the VLSI (Very Large Scale Integration) era today, an IC chip is made through several steps including wafer fabricating process, wafer test, VLSI forming process, and finally, IC packaging test.
The packaging test usually comprises a wafer attachment process, a wire-bonding process, etc., in which the wire-bonding process is conducted by a wire bonder for connecting a chip to a plurality of pins with metallic interconnects under a high-temperature and ultrasonic environment. The bonded interconnects serve as a bridge for transmitting signal and/or electric power between a chip and the external circuits. Since, almost all the makers have made different efforts to try minimizing the volume of chip as smaller as possible, and accompanying with the scaling-down semiconductor devices, the RC constant of interconnect is increased rapidly because the resistance of the metal leading increases with decreasing line width and the interconnect capacitance increases with decreasing spacing, hence, a greater resistance and capacitance is inevitably resulted when the width of wire and the space between lead wires in chip are narrowed.
On the other hand, the performance of deep sub-micron integrated circuit cannot be further improved since the delay of signal in the interconnect would exceed the delay of signal in the device. Therefore, it is necessary to use interconnects with better conductivity to replace conventional Aluminum. Copper has been identified as the best candidate due to its low resistivity, high electromigration resistance and likely lower processing cost. However, one of the disadvantages of copper is that copper is readily oxidized at low temperature, and unlike the oxidation of aluminum, the oxidation rate of copper is fast, and no self-protective oxide layer forms to prevent further oxidation. Such characteristic will deteriorate the effect in transmitting the frictional power of ultrasonic vibrations to the surface of the copper bonding-pad while bonding interconnects to the chip, so that the efficiency for stripping the oxide layer off and obtaining therethrough a smooth bonding on the surface of the copper bonding-pad is retarded, and accordingly is the yield rate. Hence, the key point for obtaining a good yield in the wire-bonding process is to prevent the copper bonding-pad from being oxidized rapidly owing to the temperature of a bonding interface.
For improvements, two ways have been suggested: (1) An inertia gas (Ar) is applied to a chip during the wire-bonding process to protect the surface thereof and lower down the temperature to slow down oxidation. (2) A thin barrier layer, a Titanium layer for example, is sputtered on the surface of a chip to prevent oxidation of the copper-bonding pad. These ways are capable of avoiding oxidation of the copper bonding-pad and enhancing the strength of bonding points though, they are both expensive and troublesome.